The key specifications when choosing your clock reference in a high speed data link are clock stability and inherent clock jitter. These two specifications will determine the baseline performance levels possible for your fiber optic or high speed microwave digital link in terms of transmitter/receiver noise, best possible bit error rate and inherent system jitter.

Lucix Corporation designs and manufactures oscillators with best-in-class phase noise performance. The phase noise of a system timing reference (clock), as measured in the frequency domain phase noise, is one performance parameter which set the inherent jitter floor of a high speeds data link.

Whether you build clock recovery circuits, data transmitters, data buffers, receivers or regenerators, using the lowest possible phase noise timing reference will yield a final product with the lowest possible inherent jitter.

Lucix Corporation manufactures low phase noise DRO's (dielectric resonance oscillators) which can be used as high speed link timing references which operate at clock speeds from 5 to 50 GHz.

Typical jitter and stability specifications for selected clock frequencies are provided below:

Frequency	Stability	Intrinsic Jitter (Ulp-p)	Phase Noise
10 GHz	1 ppm/˚ C	0.00014	pdf
20 GHz	1 ppm/˚ C	0.00037	pdf
40 GHz	1 ppm/˚ C	0.00155	pdf

Note: The intrinsic jitter values were obtained using an Agilent Technologies E5500. The intrinsic jitter value of the 40 GHz clock may be high due to test equipment noise floor limitations. The actual phase noise of this unit is expected to continue downward beyond the 100 kHz offset with an approximate slope of -26 dB/decade.

Please call Lucix at 805-987-6645 for additional information on your specific clock reference requirements.